闪迪27届校招

工作职责： 1. 负责闪存及系统级测试解决方案的设计、评估、开发与持续维护，涵盖硬件研发、软件开发、嵌入式系统开发及数据分析。 2.主导自动化测试平台的验证、验收、生产环境搭建、量产维护及性能提升。 3.参与新技术和新产品的设计与研发，推动从流片前到流片后、从硅片级到系统级的研发测试工作，包括设计验证、工程评估、质量鉴定支持、失效分析及测试覆盖率提升。 4.跨区域、跨职能团队协作，包括产品工程、闪存研发、器件、封装、固件/系统、设计及生产团队，开发并持续维护研发及量产测试代码，以兼顾高质量标准与快速研发周期。5. 利用人工智能辅助工程流程提升测试开发效率和质量，包括需求细化、多平台代码生成、自动化验证、数据分析及文档支持。 6.推动针对设计、工艺及封装问题的工程调查、失效模式分析，并提供测试层面的解决方案。 7. 推动良率提升及测试时间优化。 职位要求： 1.电子、电气工程、控制、计算机、材料或相关专业硕士学历。 2. 具备一种或多种编程语言的实践经验，如 C/C++/Java/Perl/Python。 3.具备存储技术和闪存的基础知识。 4. 具备较强的问题排查、复杂问题分析、多任务管理及按期交付能力。 5. 具备优秀的英语书面及口头沟通能力。 6.具备良好的团队协作意识、学习意愿和逻辑思维能力。 7. 具备优秀的沟通能力和人际交往技巧。

工作职责： 1. 制定并执行 NAND 可靠性表征与产品认证计划，确保符合 JEDEC 标准、内部要求及客户要求。 2.分析关键可靠性测试数据，包括耐久性、数据保持、读/编程干扰、跨温应力、HTOL 及其他 NAND 可靠性评估项目。 3.分析可靠性失效、异常数据和离群行为，识别潜在根因，并与跨职能团队协作推动改善措施。 4. 准备认证报告、风险评估、sign-off总结和技术结论，支持技术发布及客户认证决策。 5. 开发基于 AI/ML 的可靠性预测方法、筛选策略和数据自动化流程，提升测试覆盖率、工程效率和决策质量职位要求： 1. 微电子、电子工程、材料科学、物理、计算机科学、统计学或其他相关工程/理科专业硕士及以上学历。 2.扎实理解半导体器件、制造工艺、产品测试或可靠性工程基础知识。 3. 具备较强的分析思维、结构化问题解决能力、责任心，并愿意深入学习复杂的 NAND可靠性机制。 4. 具备良好的中英文沟通能力，能够清晰总结技术发现，并面向跨职能团队进行有效沟通。 5. 能够有效使用 AI工具提升工程效率、数据分析和流程自动化能力，同时具备 Python、C/C++、Perl、SQL、Excel、Power BI 或同等工具的基础编程能力。6. 优先条件：具备 NAND/NOR Flash、存储系统、可靠性测试、统计建模、机器学习或大规模数据分析相关经验或课程背景。 ESSENTIALDUTIES AND RESPONSIBILITIES: 1. Define and execute NAND reliabilitycharacterization and qualification plans in alignment with JEDEC, internal, andcustomer requirements. 2. Analyze key reliability test data, includingendurance, data retention, read/program disturb, cross-temperature stress,HTOL, and other NAND evaluations. 3. Analyze reliability failures, abnormaldata signatures, and outlier behaviors; identify potential root causes anddrive corrective actions with cross-functional teams. 4. Prepare qualificationreports, risk assessments, sign-off summaries, and technical conclusions tosupport technology release and customer qualification decisions. 5. DevelopAI/ML-based reliability prediction methods, screening approaches, and dataautomation flows to improve test coverage, engineering efficiency, anddecision-making quality. QUALIFICATIONS REQUIRED: 1. Master’s degree or abovein Microelectronics, Electrical Engineering, Materials Science, Physics,Computer Science, Statistics, or other relevant engineering/sciencedisciplines. 2. Solid understanding of semiconductor devices, fabricationprocesses, product testing, or reliability engineering fundamentals. 3. Stronganalytical thinking, structured problem-solving skills, ownership, andwillingness to learn complex NAND reliability mechanisms. 4. Good communicationskills in English and Chinese, with the ability to summarize technical findingsclearly for cross-functional teams. 5. Ability to effectively leverage AI toolsfor engineering productivity, data analysis, and workflow automation, togetherwith basic programming skills using Python, C/C++, Perl, SQL, Excel, Power BI,or equivalent tools. 6. Preferred Qualifications: Relevant experience orcoursework in NAND/NOR Flash, memory systems, reliability testing, statisticalmodeling, machine learning, or large-scale data analysis.

工作职责： 1.作为闪迪 NAND产品的DPPM（每百万个产品中的不良数比例）负责人。2.在新产品设计研发及生产阶段进行深入的电学性故障分析。持续挖掘晶圆级测试和封装过程中的失效问题原因。根据失效分析结果创建分析报告，通过与全球研发部门（器件工程师、电路设计工程师、晶园厂产品工程师等）技术沟通合作制定并实施解决方案。3.对各产品线的存储芯片进行质量管控，监管每百万个产品中的不良数比例；与工厂及器件部门进行协作，改进芯片的生产工艺流程，以提高芯片良率。4.通过对故障根本原因的分析，研发并制定测试流程，制定screen/stress方法，并与产品测试工程师协作，制定详细测试计划并推动实施。 职位要求： 1.电气工程、计算机工程、物理学、材料科学或其他相关技术领域的硕士或以上学历。 2. 深入了解电气故障分析方法。 3.具有分析问题、诊断根本原因和采取纠正措施的能力。 4. 出色的数据分析技能，包括数据处理、统计分析和解释。 5. 积极性高，热衷于排除故障和解决复杂问题。6. 对系统、F/W 工作原理、设备物理有基本了解者优先。 7. 良好的英语沟通能力。 ESSENTIAL DUTIES ANDRESPONSIBILITIES: 1. DPPM (Defective part per million) owner of all NANDproducts in SanDisk. Drive NAND development from pre-silicon (circuitsimulation for stress/screen test method), 1st silicon to qualification.Develop and define test strategy and test flow for miscellaneous NAND siliconbased on DOEs result from dedicated R&D platform. 2. Performing deep electricalfailure analysis during new product development and ramping phase. Shootfailures from both wafer level and package level. Create analysis report basedon FA finding and define the action plans after communication with stockholders(Device engineer, Design engineers, Fab product engineer, etc.). 3. Monitormemory health level and DPPM pareto for miscellaneous product lines. Work withFAB/device to improve and fine tune the fab process for DPPM reduction. 4.Define the test flow, screen/stress method based on root cause analysis offailures. Work with TE to come up with detail plans and drive forimplementation. QUALIFICATIONS REQUIRED: 1. MS or higher in ElectricalEngineering, Computer Engineering, Physics, Materials Science or anotherrelated technical field. 2. Deep understanding on electrical failure analysismethodology. 3. Demonstrated ability to analyze problems, diagnose root cause,and apply corrective actions. 4. Excellent data analysis skills including datacrunch, statistical analysis, and interpretation. 5. Highly self-motivated,passionate about troubleshooting and solving complex problems. 6. A basicunderstanding of system, F/W working principle, device physics is beneficial.7. Good English communication skill.

工作职责： 1. 负责NAND闪存产品的测试方案设计和开发; 2. 负责闪存产品及封装的验证，设置可靠性测试，失效分析及对应的行动计划; 3.研究并提供正确的闪存测试条件，设计并确定量产的测试流程; 4. 设计可靠性相关的产品验证实验，改善产品的质量，提高晶圆和芯片测试的良率; 5.分析测试时间，改进测试方法以减少测试时间和费用并且提高测试覆盖度; 6. 定义并改善测试方法，使新产品到达量产的标准推向市场; 7.提供世界级的测试开发进度，达到最有效的产品送样流程; 8. 和多个团队协作完成产品开发任务。 职位要求： 1.电子/电气工程/控制/计算机/材料相关专业，硕士学历; 2. 有使用一种或者多种编程语言的经验 (C/C++/Java/Perl/Python) ; 3.多任务下的分析处理复杂问题的能力; 4. 良好的英语听说读写沟通能力; 5. 良好的团队协作能力，学习能力和逻辑思考能力; 6.良好的沟通能力和人际交往技巧。 ESSENTIAL DUTIES AND RESPONSIBILITIES: 1. Be responsible forNAND Flash product test solution design and development. 2. Be responsible forNAND Product and Package Qualification/Reliability tests setup/eFA/Action Plan.3. Research and provide correct test condition for memory product and designtest flow for volume testing needs. 4. Design Product Evaluation DOE forReliability/DPPM improvement, wafer test and unit test yield improvement. 5.Analysis test time to get lowest cost test method in order to reach short testtime and high-test coverage. 6. Define/improve testing method to deal with newproduct introduced to mass production and marketing. 7. Deliver a world classthroughput time on the test development to reach the most effective way ofsample delivery TPT (Throughput Time). 8. Work with multinational team tocomplete projects in PDT (product development team) required time.QUALIFICATIONS REQUIRED: 1. Electrical/Electronic/Computer/Material Engineeringbackground with MS degree. 2. Coding experience with one or some ofC/C++/Java/Perl/Python. 3. Ability to troubleshoot, analyze complex problems,multi-task and meet deadline. 4. Excellent English communication (written andverbal). 5. Good teamwork, willing to learn, logical thinking. 6. Excellentcommunication and interpersonal skills.

工作职责： 1. 针对NAND存储器优化参数的发布进行晶圆级评估，确保多种NAND产品线（如CSS/ESS/Apple/iNAND/ECB等）的器件优化参数顺利发布。 2.与MemoryHealth团队合作，评估器件参数调节与screen/stress是否完美匹配。3.同时，另一个主要职责是分析影响良率的各种因素，哪些是主要由于器件参数调节设置造成的。4.与US总部器件研发团队合作，推动应用于高密度存储的闪存器的性能和可靠性的开发。 5. 与Memory System团队合作，如SSD,iNAND等的用户或单位，设计和开发系统级器件特性，提高系统级性能和可靠性。 6.在未来的职业发展中，候选人将会成为团队的一部分，参与存储业务、技术研发以及工艺制造等环节的重要工作。 7. 与Process, Design, MH,Reliability 和System团队沟通协作，确保及时完成产品设备支持，质量检测以及产量。 职位要求： 1.电气工程、应用物理、材料科学及其他相关学科硕士及以上学历。 2. 对半导体器件物理、工艺、可靠性以及电路设计有深入理解，有NAND 闪存器件物理相关知识更佳。3. 熟悉C/C++/Java编程以及Perl/Python脚本为加分项。 4. 较强的独立分析问题、探究问题根本原因以及采取改正措施的能力。 5.出色的数据分析能力，包括数据处理, 统计分析及数据理解。 6. 高度自我激励，热衷于排查故障并解决复杂问题。 7. 良好的英文沟通技能。 8.做事要有责任心。 ESSENTIAL DUTIES AND RESPONSIBILITIES: 1. In this position, theindividual will do wafer level evaluations for NAND memory parameter trimrelease for miscellaneous product lines (CSS/ESS/Apple/iNAND/ECB, etc.). Makesure NAND device trim release smoothly. 2. The individual will also work withmemory health team to assess if the device parameter trims and screen/stressperfectly match. 3. Meanwhile, yield analysis for items which are dominated bydevice parameter trim setting is another major responsibility. 4. Also, theindividual can co-work with US headquarter device team to push the performanceand reliability envelope of flash memory which is used in best-in-classhigh-density storage application. 5. The individual will also co-work withmemory system team, such as consumer and enterprise SSD, iNAND and others, todesign and develop system device features to improve system level performanceand reliability. 6. In further career path, candidate will be part of a teamthat sits at the hub of activity between storage business units, technologydevelopment, and manufacturing. 7. The individual will communicate & work withmembers from process, design, MH, reliability, and system groups to ensuretimely product device support, memory qualification, and ramp of volumeproduction. QUALIFICATIONS REQUIRED: 1. This position requires an MS/PhD degreein Electrical Engineering, Applied Physics, Material science or a relatedfield. 2. This position requires in-depth knowledge of semiconductor devicephysics, process, and reliability, as well as circuit design. NAND flash memorydevice and physics knowledge will be perfect. 3. C/C++/Java Programming andPerl/Python scripts is beneficial. 4. Demonstrated ability to independentlyanalyze problems, diagnose root cause, and apply corrective actions. 5.Excellent data analysis skills including data crunch, statistical analysis, andinterpretation. 6. Highly self-motivated, passionate about troubleshooting andsolving complex problems. 7. Good English communication skill. 8.Responsibility taking attitude.